ïÔ: D&R SoC News Alert [SoC-NewsAlert@design-reuse.com]
ïÔÐÒÁ×ÌÅÎÏ: 13 ÉÀÎÑ 2005 Ç. 21:59
ëÏÍÕ: Michael Dolinsky
ôÅÍÁ: D&R SoC News Alert - June 13, 2005
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DR SoC News Alert
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June 13, 2005    


WELCOME
Michael,
Welcome to the issue of June 13, 2005 of D&R SoC News Alert, our email update to provide you with the latest news and information in the System-On-Chip Community.

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NEW IP/SOC PRODUCTS
ADSL/2/2+, VDSL/2 Silicon Intellectual Property Platform from Aware, Inc.
IBM PowerPC 440 Synthesizable Microprocessor Core from Synopsys, Inc.
High Throughput AES-CCM Core for 802.15.3 Applications from Elliptic Semiconductor
Programmable Clock Generator from Kaben Research Inc.
PCI Express Upstream / Downstream Cores from NitAl Consulting Services,Inc.
8-bit, 200 kHz, 3.3V SAR ADC w/ 4:1 Input Mux from ChipIdea Microelectronics
MPEG-2 Video Presentation Unit from sci-worx GmbH
Hardware / Software development platform for RF/Microwave/Radio/Radar applicatons from Wavebreaker AB
INDUSTRY ARTICLES
Transaction-Level Modelling and Debug of SoCs
Fit multimedia handsets with the right memory architecture
Implementing Power Management IP for Dynamic and Static Power Reduction in Configurable Microprocessors using the Galaxy Design Platform at 130nm
Optimize performance and power consumption with DSP hardware, software
Top-down approach speeds mixed-signal design
COMMENTARY/ANALYSIS
Analog, mixed-signal set to invigorate IP market, says Gartner
Gartner Dataquest analyst gives ASIC, FPGA markets clean bill of health
Trading analog intellectual property
Power issues heat up chip forum
Interview - Gary Meyers, president and CEO of Synplicity : FPGA or ASIC?
IN THE NEWS
IP/SOC PRODUCTS
MoSys Delivers 0.13 Micron 1T-SRAM Memory Compiler
MoSys Unveils Its 1T-SRAM ''CLASSIC Macro'' Family
CAST Announces PCI Express Endpoint Controller Core
LTRIM Converters Aim to Reduce Battery Use - High-efficiency Buck/Dual-mode IP Blocks Announced
New LTRIM Boost Converters Boast High-Efficiency - Analog IP blocks target Single and Dual battery-powered products
Spiral Gateway preps C-programmable low-power fabric
Avery Design and ASIC Architect Team to Deliver PCI Express IP Solution
German company to introduce PLL IP core at DAC
Avery Design Systems Spins Up ATA Verification IP Family
Knowlent Alleviates XAUI Interface Electrical Verification Bottleneck with New Opal XAUI EVP
Synopsys and IBM Announce Availability of Fully Synthesizable PowerPC Cores and SystemC Models
Unique Fractional Resampling Cores from RF Engines
Denali Software and GDA Technologies Team to Deliver Comprehensive Intellectual Property Solutions for Advanced Switching Interconnect Systems
Synopsys Announces DesignWare IP Support for PCI Express 1.1 Specification
STRUCTURED ASIC
NEC Electronics Provides ISSP Structured ASIC Customers
Fujitsu and Synplicity Launch Amplify AccelArray Pro Software; Qualified and Recommended Physical Synthesis Software for Fujitsu AccelArray Structured ASICs
austriamicrosystems to manufacture Triad Semi mixed signal structured ASICs
DEALS
ARM Libraries Adopted By IBM, The World's ASIC Technology Leader
Creo Uses CAST IP Cores in Advanced Leaf Aptus Digital Camera Backs
Imagination Technologies' PowerVR IP Incorporated in Freescale Multimedia Processor for Mobile Entertainment Devices
Atheros Communications Selects Denali Verification IP for PCI Express, USB, Ethernet Designs
Epson Licenses Sarnoff's TakeCharge ESD Design IP For High-Voltage Driver ICs Used In LCD Panels
Mixed Signal IP from Silicon & Software Systems for Digital Video Broadcast (DVB) solutions selected by Micronas
BUSINESS
Silicon Image Ranks Among Top 10 in Semiconductor IP Survey
Gartner Says Worldwide Semiconductor IP Industry Grows 21 Percent in 2004 as Industry Experiences Significant Consolidation
ST reveals plan to cut 2,300 jobs in Europe
FINANCIAL RESULTS
LSI Logic Raises Q2 2005 Revenue Range
Actel Corporation Announces Second Quarter Business Update
Faraday Monthly Sales Report - May 2005
Xilinx Updates Guidance for June Quarter FY06
LEGAL
Patriot Scientific and TPL Group Unify Portfolio of Fundamental Microprocessor Patents
Rambus Adds Samsung Electronics to Patent Infringement Litigation
PEOPLE
Arteris Lays Foundation for Global Expansion, Names Industry Veteran Janac as CEO
Antonio J. Viana Joins Tensilica as Sr. VP of Worldwide Sales
DESIGN SERVICES
Silicon & Software Systems (S3) Delivers Another First Time Right System IC Design
EMBEDDED SYSTEMS
D2 Technologies to Provide Optimized VoIP Algorithms for New High-Performance MIPS32®24KE Cores
ARM Announces SPIRIT Support For ARM RealView Tools With MaxSim Technology To Accelerate Time-To-Market For SoC Designers
CEVA and Ignios Demonstrate Multicore DSP
ARM Expands RealView Product Family with Fast Simulation Technology to Speed Up Software Development
Cradle Enhances MPEG-4 IP Video Streamer Reference Design with Power-Over-Ethernet
SafeNet Demonstrates Interoperability with Leading Device Manufacturers at First OMA DRM V2.0 Test Fest
FOUNDRIES
IBM Extends Industry Leading Custom Chip Technology to Embedded Devices
TSMC Announce May 2005 Sales and Revise Upward 2Q2005 Guidance
TSMC Reference Flow 6.0 Opens Door to 65nm Design
China to build 20 new fabs by 2008
SMIC Adds New Design Kit for its 0.18um CMOS Process for Use with Agilent Technologies'EDA Software
IBM, Chartered and Samsung Extend Common Design Enablement Platform for 65-Nanometer Base and Low-Power Processes
FPGA/CPLD
Altera and Mango DSP Announce Bluejay Video Processing Board Featuring Stratix II FPGAs
FPGA users taxed but satisfied
Xilinx Embedded PowerPC Solution Gains Significant Industry Adoption
Altera Announces DSP Development Kit With Industry's Highest-Density FPGA
FABLESS / IDM
NEC Electronics America Introduces Secure Single-Chip MPEG Decoder
NEC Electronics Introduces Single-Chip Secure MPEG Decoder for Set Top Boxes
EDA
CoWare Delivers SystemC Models for PMC-Sierra's RM7900 Processor Family
CoWare and MIPS Technologies to Automate Application-Optimized Processor Creation
ESL may rescue EDA, analysts say
CoWare Introduces CORXpert Technology to Help Boost Processor Performance
Bluespec Targets Low-Power ESL Synthesis
OTHER
Temento Systems announces a Distributorship agreement with SAROS Technology
PCI Express train rolls across multiple tracks
True Circuits Attends Design Automation Conference, Features Complete Line of PLL and DLL Intellectual Property for ASIC, FPGA and SoC Designs

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DAC 2005
June 13-16, 2005
Anaheim, CA
Booth #1341
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